ICALEPCS2023 - List of Keywords (embedded)

Paper	Title	Other Keywords	Page
MO2BCO06	Embedded Controller Software Development Best Practices at the National Ignition Facility	controls, software, hardware, interface	54
	V.K. Gopalan, A.I. Barnes, C.M. Estes, J.M. Fisher, V.J. Hernandez, P. Kale, A. Pao, P.K. Singh LLNL, Livermore, USA
	Funding: This work was performed under the auspices of the U.S. Department of Energy by Lawrence Livermore National Laboratory under Contract DE-AC52-07NA27344. Software development practices such as continuous integration and continuous delivery (CI/CD) are widely adopted by the National Ignition Facility (NIF) which helps to automate the software development, build, test, and deployment processes. However, using CI/CD in an embedded controller project poses several challenges due to the limited computing resources such as processing power, memory capacity and storage availability in such systems. This paper will present how CI/CD best practices were tailored and used to develop and deploy software for one of the NIF Master Oscillator Room (MOR) embedded controllers, which is based on custom designed hardware consisting of a microcontroller and a variety of laser sensors and drivers. The approach included the use of automated testing frameworks, customized build scripts, simulation environments, and an optimized build and deployment pipeline, leading to quicker release cycles, improved quality assurance and quicker defect correction. The paper will also detail the challenges faced during the development and deployment phases and the strategies used to overcome them. The experience gained with this methodology on a pilot project demonstrated that using CI/CD in embedded controller projects can be challenging, yet feasible with the right tools and strategies, and has the potential to be scaled and applied to the vast number of embedded controllers in the NIF control system. LLNL Release Number: LLNL-ABS-848418
	Slides MO2BCO06 [1.346 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-MO2BCO06
About •	Received ※ 29 September 2023 — Revised ※ 12 October 2023 — Accepted ※ 14 November 2023 — Issued ※ 30 November 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MO4AO03	The DESY Open Source FPGA Framework	framework, FPGA, simulation, hardware	222
	Ł. Butkowski, A. Bellandi, M. Büchler, B. Dursun, C. Gümüş, N. Omidsajedi, K. Schulz DESY, Hamburg, Germany
	Modern FPGA firmware development involves integrating various intellectual properties (IP), modules written in hardware description languages (HDL), high-level synthesis (HLS), and software/hardware CPUs with embedded Linux or bare-metal applications. This process may involve multiple tools from the same or different vendors, making it complex and challenging. Additionally, scientific institutions such as DESY require long-term maintenance and reproducibility for designs that may involve multiple developers, further complicating the process. To address these challenges, we have developed an open-source FPGA firmware framework (FWK) at DESY that streamlines development, facilitates collaboration, and reduces complexity. The FWK achieves this by providing an abstraction layer, a defined structure, and guidelines to create big FPGA designs with ease. FWK also generates documentation and address maps necessary for high-level software frameworks like ChimeraTK. This paper presents an overview and the idea of the FWK.
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-MO4AO03
About •	Received ※ 05 October 2023 — Accepted ※ 13 October 2023 — Issued ※ 13 October 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUMBCMO07	Dynamic Control Room Interfaces for Complex Particle Accelerator Systems	interface, controls, operation, lattice	351
	B.E. Bolling, G. Fedel, M. Muñoz, D.N. Nordt ESS, Lund, Sweden
	The European Spallation Source (ESS) is a research facility under construction aiming to be the world’s most powerful pulsed neutron source. It is powered by a complex particle accelerator designed to provide a 2.86 ms long proton pulse at 2 GeV with a repetition rate of 14 Hz. Commissioning of the first part of the accelerator has begun and the requirements on the control system interfaces varies greatly as progress is made and new systems are added. In this paper, three such applications are discussed in separate sections. A Navigator interface was developed for the control room interfaces aimed towards giving operators and users a clear and structured way towards quickly finding the needed interface(s) they need. The construction of this interface is made automatically via a Python-based application and is built on applications in any directory structure both with and without developer interference (fully and semi-automatic methods). The second interface discussed in this paper is the Operations Accelerator Synoptic interface, which uses a set of input lattices and system interface templates to construct configurable synoptic view of the systems in various sections and a controller panel for any selected system. Lastly for this paper there is a configurable Radio Frequency Orchestration interface for Operations, which allows in-situ modification of the interface depending on which systems and components are selected.
	Slides TUMBCMO07 [3.248 MB]
	Poster TUMBCMO07 [10.503 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUMBCMO07
About •	Received ※ 04 October 2023 — Accepted ※ 21 November 2023 — Issued ※ 04 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPDP025	Board Bring-up with FPGA Framework and ChimeraTK on Yocto	controls, hardware, software, Linux	557
	J. Georg, A.W.C. Barker, L. Butkowski, M. Hierholzer, M. Killenberg, T. Kozak, N. Omidsajedi, M. Randall, D. Rothe, N. Shehzad, C. Willner DESY, Hamburg, Germany K. Zenker HZDR, Dresden, Germany
	This presentation will showcase our experience in board bring-up using our FPGA Framework and ChimeraTK, our C++ hardware abstraction library. The challenges involved in working with different FPGA vendors will be discussed, as well as how the framework and library help to abstract vendor-specific details to provide a consistent interface for applications. Our approach to integrating this framework and libraries with Yocto, a popular open-source project for building custom Linux distributions, will be discussed. We will show how we leverage Yocto’s flexibility and extensibility to create a customized Linux image that includes our FPGA drivers and tools, and discuss the benefits of this approach for embedded development. Finally, we will share some of our best practices for board bring-up using our framework and library, including tips for debugging and testing. Our experience with FPGA-based board bring-up using ChimeraTK and Yocto should be valuable to anyone interested in developing embedded systems with FPGA technology
	Poster TUPDP025 [0.567 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP025
About •	Received ※ 06 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 15 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPDP075	OPC UA EPICS Bridge	EPICS, PLC, controls, software	681
	W. Duckitt Stellenbosch University, Matieland, South Africa J.K. Abraham iThemba LABS, Somerset West, South Africa
	OPC UA is a service-orientated communication architecture that supports platform-independent, data exchange between embedded micro-controllers, PLCs or PCs and cloudbased infrastructure. This makes OPC UA ideal for developing manufacturer independent communication to vendor specific PLCs, for example. With this in mind, we present an OPC UA to EPICS bridge that has been containerized with Docker to provide a micro-service for communicating between EPICS and OPC UA variables.
	Poster TUPDP075 [0.681 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP075
About •	Received ※ 03 October 2023 — Revised ※ 20 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 12 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TH2AO01	Log Anomaly Detection on EuXFEL Nodes	FEL, network, GUI, monitoring	1126
	A. Sulc, A. Eichler, T. Wilksen DESY, Hamburg, Germany
	Funding: This work was supported by HamburgX grant LFF-HHX-03 to the Center for Data and Computing in Natural Sciences (CDCS) from the Hamburg Ministry of Science, Research, Equalities and Districts. This article introduces a method to detect anomalies in the log data generated by control system nodes at the European XFEL accelerator. The primary aim of this proposed method is to offer operators a comprehensive understanding of the availability, status, and problems specific to each node. This information is vital for ensuring the smooth operation. The sequential nature of logs and the absence of a rich text corpus that is specific to our nodes pose a significant limitation for traditional and learning-based approaches for anomaly detection. To overcome this limitation, we propose a method that uses word embedding and models individual nodes as a sequence of these vectors that commonly co-occur, using a Hidden Markov Model (HMM). We score individual log entries by computing a probability ratio between the probability of the full log sequence including the new entry and the probability of just the previous log entries, without the new entry. This ratio indicates how probable the sequence becomes when the new entry is added. The proposed approach can detect anomalies by scoring and ranking log entries from EuXFEL nodes where entries that receive high scores are potential anomalies that do not fit the routine of the node. This method provides a warning system to alert operators about these irregular log events that may indicate issues.
	Slides TH2AO01 [1.420 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TH2AO01
About •	Received ※ 30 September 2023 — Accepted ※ 08 December 2023 — Issued ※ 13 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPDP026	Voltumna Linux: A Custom Distribution for (Embedded) Systems	Linux, software, target, controls	1366
	L. Pivetta, A.I. Bogani, G. Scalamera Elettra-Sincrotrone Trieste S.C.p.A., Basovizza, Italy
	In the last years a thorough approach has been adopted to address the aging and the variability of control system platforms at Elettra Sincrotrone Trieste. The second generation of an in-house built operating system, named Voltumna Linux, which is based on immutable image approach, is now ready for production, supporting a number of commercial-off-the-shelf embedded systems. Moreover, the same approach is perfectly suitable for rack-mount servers, with large memory support, that often require the inclusion of third party or closed source packages. Being entirely based on Git for revision control, Voltumna Linux brings in a number of advantages, such as reproducibility of the product, ease of upgrading or downgrading complete systems, centralized management and deployment of the user software to name a few.
	Poster THPDP026 [1.482 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THPDP026
About •	Received ※ 04 October 2023 — Revised ※ 25 October 2023 — Accepted ※ 13 December 2023 — Issued ※ 15 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

MO2BCO06

Embedded Controller Software Development Best Practices at the National Ignition Facility

controls, software, hardware, interface

54

V.K. Gopalan, A.I. Barnes, C.M. Estes, J.M. Fisher, V.J. Hernandez, P. Kale, A. Pao, P.K. Singh
LLNL, Livermore, USA

Funding: This work was performed under the auspices of the U.S. Department of Energy by Lawrence Livermore National Laboratory under Contract DE-AC52-07NA27344.
Software development practices such as continuous integration and continuous delivery (CI/CD) are widely adopted by the National Ignition Facility (NIF) which helps to automate the software development, build, test, and deployment processes. However, using CI/CD in an embedded controller project poses several challenges due to the limited computing resources such as processing power, memory capacity and storage availability in such systems. This paper will present how CI/CD best practices were tailored and used to develop and deploy software for one of the NIF Master Oscillator Room (MOR) embedded controllers, which is based on custom designed hardware consisting of a microcontroller and a variety of laser sensors and drivers. The approach included the use of automated testing frameworks, customized build scripts, simulation environments, and an optimized build and deployment pipeline, leading to quicker release cycles, improved quality assurance and quicker defect correction. The paper will also detail the challenges faced during the development and deployment phases and the strategies used to overcome them. The experience gained with this methodology on a pilot project demonstrated that using CI/CD in embedded controller projects can be challenging, yet feasible with the right tools and strategies, and has the potential to be scaled and applied to the vast number of embedded controllers in the NIF control system.
LLNL Release Number: LLNL-ABS-848418

Slides MO2BCO06 [1.346 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-MO2BCO06

About •

Received ※ 29 September 2023 — Revised ※ 12 October 2023 — Accepted ※ 14 November 2023 — Issued ※ 30 November 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MO4AO03

The DESY Open Source FPGA Framework

framework, FPGA, simulation, hardware

222

Ł. Butkowski, A. Bellandi, M. Büchler, B. Dursun, C. Gümüş, N. Omidsajedi, K. Schulz
DESY, Hamburg, Germany

Modern FPGA firmware development involves integrating various intellectual properties (IP), modules written in hardware description languages (HDL), high-level synthesis (HLS), and software/hardware CPUs with embedded Linux or bare-metal applications. This process may involve multiple tools from the same or different vendors, making it complex and challenging. Additionally, scientific institutions such as DESY require long-term maintenance and reproducibility for designs that may involve multiple developers, further complicating the process. To address these challenges, we have developed an open-source FPGA firmware framework (FWK) at DESY that streamlines development, facilitates collaboration, and reduces complexity. The FWK achieves this by providing an abstraction layer, a defined structure, and guidelines to create big FPGA designs with ease. FWK also generates documentation and address maps necessary for high-level software frameworks like ChimeraTK. This paper presents an overview and the idea of the FWK.

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-MO4AO03

About •

Received ※ 05 October 2023 — Accepted ※ 13 October 2023 — Issued ※ 13 October 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUMBCMO07

Dynamic Control Room Interfaces for Complex Particle Accelerator Systems

interface, controls, operation, lattice

351

B.E. Bolling, G. Fedel, M. Muñoz, D.N. Nordt
ESS, Lund, Sweden

The European Spallation Source (ESS) is a research facility under construction aiming to be the world’s most powerful pulsed neutron source. It is powered by a complex particle accelerator designed to provide a 2.86 ms long proton pulse at 2 GeV with a repetition rate of 14 Hz. Commissioning of the first part of the accelerator has begun and the requirements on the control system interfaces varies greatly as progress is made and new systems are added. In this paper, three such applications are discussed in separate sections. A Navigator interface was developed for the control room interfaces aimed towards giving operators and users a clear and structured way towards quickly finding the needed interface(s) they need. The construction of this interface is made automatically via a Python-based application and is built on applications in any directory structure both with and without developer interference (fully and semi-automatic methods). The second interface discussed in this paper is the Operations Accelerator Synoptic interface, which uses a set of input lattices and system interface templates to construct configurable synoptic view of the systems in various sections and a controller panel for any selected system. Lastly for this paper there is a configurable Radio Frequency Orchestration interface for Operations, which allows in-situ modification of the interface depending on which systems and components are selected.

Slides TUMBCMO07 [3.248 MB]

Poster TUMBCMO07 [10.503 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUMBCMO07

About •

Received ※ 04 October 2023 — Accepted ※ 21 November 2023 — Issued ※ 04 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPDP025

Board Bring-up with FPGA Framework and ChimeraTK on Yocto

controls, hardware, software, Linux

557

J. Georg, A.W.C. Barker, L. Butkowski, M. Hierholzer, M. Killenberg, T. Kozak, N. Omidsajedi, M. Randall, D. Rothe, N. Shehzad, C. Willner
DESY, Hamburg, Germany
K. Zenker
HZDR, Dresden, Germany

This presentation will showcase our experience in board bring-up using our FPGA Framework and ChimeraTK, our C++ hardware abstraction library. The challenges involved in working with different FPGA vendors will be discussed, as well as how the framework and library help to abstract vendor-specific details to provide a consistent interface for applications. Our approach to integrating this framework and libraries with Yocto, a popular open-source project for building custom Linux distributions, will be discussed. We will show how we leverage Yocto’s flexibility and extensibility to create a customized Linux image that includes our FPGA drivers and tools, and discuss the benefits of this approach for embedded development. Finally, we will share some of our best practices for board bring-up using our framework and library, including tips for debugging and testing. Our experience with FPGA-based board bring-up using ChimeraTK and Yocto should be valuable to anyone interested in developing embedded systems with FPGA technology

Poster TUPDP025 [0.567 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP025

About •

Received ※ 06 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 15 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPDP075

OPC UA EPICS Bridge

EPICS, PLC, controls, software

681

W. Duckitt
Stellenbosch University, Matieland, South Africa
J.K. Abraham
iThemba LABS, Somerset West, South Africa

OPC UA is a service-orientated communication architecture that supports platform-independent, data exchange between embedded micro-controllers, PLCs or PCs and cloudbased infrastructure. This makes OPC UA ideal for developing manufacturer independent communication to vendor specific PLCs, for example. With this in mind, we present an OPC UA to EPICS bridge that has been containerized with Docker to provide a micro-service for communicating between EPICS and OPC UA variables.

Poster TUPDP075 [0.681 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP075

About •

Received ※ 03 October 2023 — Revised ※ 20 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 12 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TH2AO01

Log Anomaly Detection on EuXFEL Nodes

FEL, network, GUI, monitoring

1126

A. Sulc, A. Eichler, T. Wilksen
DESY, Hamburg, Germany

Funding: This work was supported by HamburgX grant LFF-HHX-03 to the Center for Data and Computing in Natural Sciences (CDCS) from the Hamburg Ministry of Science, Research, Equalities and Districts.
This article introduces a method to detect anomalies in the log data generated by control system nodes at the European XFEL accelerator. The primary aim of this proposed method is to offer operators a comprehensive understanding of the availability, status, and problems specific to each node. This information is vital for ensuring the smooth operation. The sequential nature of logs and the absence of a rich text corpus that is specific to our nodes pose a significant limitation for traditional and learning-based approaches for anomaly detection. To overcome this limitation, we propose a method that uses word embedding and models individual nodes as a sequence of these vectors that commonly co-occur, using a Hidden Markov Model (HMM). We score individual log entries by computing a probability ratio between the probability of the full log sequence including the new entry and the probability of just the previous log entries, without the new entry. This ratio indicates how probable the sequence becomes when the new entry is added. The proposed approach can detect anomalies by scoring and ranking log entries from EuXFEL nodes where entries that receive high scores are potential anomalies that do not fit the routine of the node. This method provides a warning system to alert operators about these irregular log events that may indicate issues.

Slides TH2AO01 [1.420 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TH2AO01

About •

Received ※ 30 September 2023 — Accepted ※ 08 December 2023 — Issued ※ 13 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPDP026

Voltumna Linux: A Custom Distribution for (Embedded) Systems

Linux, software, target, controls

1366

L. Pivetta, A.I. Bogani, G. Scalamera
Elettra-Sincrotrone Trieste S.C.p.A., Basovizza, Italy

In the last years a thorough approach has been adopted to address the aging and the variability of control system platforms at Elettra Sincrotrone Trieste. The second generation of an in-house built operating system, named Voltumna Linux, which is based on immutable image approach, is now ready for production, supporting a number of commercial-off-the-shelf embedded systems. Moreover, the same approach is perfectly suitable for rack-mount servers, with large memory support, that often require the inclusion of third party or closed source packages. Being entirely based on Git for revision control, Voltumna Linux brings in a number of advantages, such as reproducibility of the product, ease of upgrading or downgrading complete systems, centralized management and deployment of the user software to name a few.

Poster THPDP026 [1.482 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THPDP026

About •

Received ※ 04 October 2023 — Revised ※ 25 October 2023 — Accepted ※ 13 December 2023 — Issued ※ 15 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)