ICALEPCS2023 - List of Authors (Serra-Gallifa, X.)

Paper	Title	Page
TUPDP077	Towards the ALBA II : the Computing Division Preliminary Study	691
	O. Matilla, J.A. Avila-Abellan, F. Becheri, S. Blanch-Torné, A.M. Burillo, A. Camps Gimenez, I. Costa, G. Cuní, T. Fernández Maltas, R.H. Homs, J. Moldes, E. Morales, C. Pascual-Izarra, S. Pusó Gallart, A. Pérez Font, Z. Reszela, B. Revuelta, A. Rubio, S. Rubio-Manrique, J. Salabert, N. Serra, X. Serra-Gallifa, N. Soler, S. Vicente Molina, J. Villanueva ALBA-CELLS, Cerdanyola del Vallès, Spain
	The ALBA Synchrotron has started the work for up-grading the accelerator and beamlines towards a 4th gen-eration source, the future ALBA II, in 2030. A complete redesign of the magnets lattice and an upgrade of the beamlines will be required. But in addition, the success of the ALBA II project will depend on multiple factors. First, after thirteen years in operation, all the subsystems of the current accelerator must be revised. To guarantee their lifetime until 2060, all the possible ageing and obsoles-cence factors must be considered. Besides, many tech-nical enhancements have improved performance and reliability in recent years. Using the latest technologies will also avoid obsolescence in the medium term, both in the hardware and the software. Considering this, the pro-ject ALBA II Computing Preliminary Study (ALBA II CPS) was launched in mid-2021, identifying 11 work packages. In each one, a group of experts were selected to analyze the different challenges and needs in the compu-ting and electronics fields for future accelerator design: from power supplies technologies, IOC architectures, or PLC-based automation systems to synchronization needs, controls software stack, IT Systems infrastructure or ma-chine learning opportunities. Now, we have a clearer picture of what is required. Hence, we can build a realistic project plan to ensure the success of the ALBA II. It is time to get ALBA II off the ground.
	Poster TUPDP077 [0.687 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP077
About •	Received ※ 05 October 2023 — Revised ※ 09 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 15 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THMBCMO22	Towards Defining a Synchronization Standard Between Beamline Components and Synchrotron Accelerators	1242
	J.A. Avila-Abellan, X. Serra-Gallifa ALBA-CELLS, Cerdanyola del Vallès, Spain T.M. Cobb DLS, Oxfordshire, United Kingdom R. Hino ESRF, Grenoble, France O.H. Seeck DESY, Hamburg, Germany S. Zhang SOLEIL, Gif-sur-Yvette, France
	Funding: LEAPS-INNOV project has received funding from the European Union’s Horizon 2020 research and innovation program under Grant Agreement No 101004728 Standardization is a magic word in the electronics engineering jargon. Under its umbrella, it is generated the utopia of transparent integration with the rest of the parts with minimal extra effort for the software integration. But the experimental setup in a synchrotron beamline presents multiple challenges: it is highly dynamic and diverse. In the frame of LEAPS-INNOV project (*), the Task 3 of Work Package 5 aims to define a standard for synchronization in the beamline sample environment. Their partners (ALBA, DESY, DLS, ESRF and SOLEIL) have already reached a common vision of synchronization requirements. This paper first details the participants’ actual synchronization needs on their facilities. Next, the requirements foreseen for the future are outlined in terms of interfaces, time constraints and compatibility with timing systems. To conclude, we summarize the current state of the project: the hardware interfaces and the hardware platform definition. They both have been decided considering long-term availability, use of standard sub-components, and keeping the compromise between cost, development time, maintenance, reliability, flexibility and performance. This hardware architecture proposal meets the identified requirements. In the future, under the scope of LEAPS-INNOV, a demonstrator will be built, and we will work with the industry for its future commercialization.
	Slides THMBCMO22 [1.592 MB]
	Poster THMBCMO22 [0.760 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THMBCMO22
About •	Received ※ 06 October 2023 — Revised ※ 11 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 19 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

Towards the ALBA II : the Computing Division Preliminary Study

691

O. Matilla, J.A. Avila-Abellan, F. Becheri, S. Blanch-Torné, A.M. Burillo, A. Camps Gimenez, I. Costa, G. Cuní, T. Fernández Maltas, R.H. Homs, J. Moldes, E. Morales, C. Pascual-Izarra, S. Pusó Gallart, A. Pérez Font, Z. Reszela, B. Revuelta, A. Rubio, S. Rubio-Manrique, J. Salabert, N. Serra, X. Serra-Gallifa, N. Soler, S. Vicente Molina, J. Villanueva
ALBA-CELLS, Cerdanyola del Vallès, Spain

The ALBA Synchrotron has started the work for up-grading the accelerator and beamlines towards a 4th gen-eration source, the future ALBA II, in 2030. A complete redesign of the magnets lattice and an upgrade of the beamlines will be required. But in addition, the success of the ALBA II project will depend on multiple factors. First, after thirteen years in operation, all the subsystems of the current accelerator must be revised. To guarantee their lifetime until 2060, all the possible ageing and obsoles-cence factors must be considered. Besides, many tech-nical enhancements have improved performance and reliability in recent years. Using the latest technologies will also avoid obsolescence in the medium term, both in the hardware and the software. Considering this, the pro-ject ALBA II Computing Preliminary Study (ALBA II CPS) was launched in mid-2021, identifying 11 work packages. In each one, a group of experts were selected to analyze the different challenges and needs in the compu-ting and electronics fields for future accelerator design: from power supplies technologies, IOC architectures, or PLC-based automation systems to synchronization needs, controls software stack, IT Systems infrastructure or ma-chine learning opportunities. Now, we have a clearer picture of what is required. Hence, we can build a realistic project plan to ensure the success of the ALBA II. It is time to get ALBA II off the ground.

Poster TUPDP077 [0.687 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP077

About •

Received ※ 05 October 2023 — Revised ※ 09 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 15 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THMBCMO22

Towards Defining a Synchronization Standard Between Beamline Components and Synchrotron Accelerators

1242

J.A. Avila-Abellan, X. Serra-Gallifa
ALBA-CELLS, Cerdanyola del Vallès, Spain
T.M. Cobb
DLS, Oxfordshire, United Kingdom
R. Hino
ESRF, Grenoble, France
O.H. Seeck
DESY, Hamburg, Germany
S. Zhang
SOLEIL, Gif-sur-Yvette, France

Funding: LEAPS-INNOV project has received funding from the European Union’s Horizon 2020 research and innovation program under Grant Agreement No 101004728
Standardization is a magic word in the electronics engineering jargon. Under its umbrella, it is generated the utopia of transparent integration with the rest of the parts with minimal extra effort for the software integration. But the experimental setup in a synchrotron beamline presents multiple challenges: it is highly dynamic and diverse. In the frame of LEAPS-INNOV project (*), the Task 3 of Work Package 5 aims to define a standard for synchronization in the beamline sample environment. Their partners (ALBA, DESY, DLS, ESRF and SOLEIL) have already reached a common vision of synchronization requirements. This paper first details the participants’ actual synchronization needs on their facilities. Next, the requirements foreseen for the future are outlined in terms of interfaces, time constraints and compatibility with timing systems. To conclude, we summarize the current state of the project: the hardware interfaces and the hardware platform definition. They both have been decided considering long-term availability, use of standard sub-components, and keeping the compromise between cost, development time, maintenance, reliability, flexibility and performance. This hardware architecture proposal meets the identified requirements. In the future, under the scope of LEAPS-INNOV, a demonstrator will be built, and we will work with the industry for its future commercialization.

Slides THMBCMO22 [1.592 MB]

Poster THMBCMO22 [0.760 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THMBCMO22

About •

Received ※ 06 October 2023 — Revised ※ 11 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 19 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)