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BiBTeX citation export for THMBCMO22: Towards Defining a Synchronization Standard Between Beamline Components and Synchrotron Accelerators

@inproceedings{avila-abellan:icalepcs2023-thmbcmo22,
  author       = {J.A. Avila-Abellan and T.M. Cobb and R. Hino and O.H. Seeck and X. Serra-Gallifa and S. Zhang},
  title        = {{Towards Defining a Synchronization Standard Between Beamline Components and Synchrotron Accelerators}},
% booktitle    = {Proc. ICALEPCS'23},
  booktitle    = {Proc. 19th Int. Conf. Accel. Large Exp. Phys. Control Syst. (ICALEPCS'23)},
  eventdate    = {2023-10-09/2023-10-13},
  pages        = {1242--1246},
  paper        = {THMBCMO22},
  language     = {english},
  keywords     = {experiment, interface, hardware, FPGA, synchrotron},
  venue        = {Cape Town, South Africa},
  series       = {International Conference on Accelerator and Large Experimental Physics Control Systems},
  number       = {19},
  publisher    = {JACoW Publishing, Geneva, Switzerland},
  month        = {02},
  year         = {2024},
  issn         = {2226-0358},
  isbn         = {978-3-95450-238-7},
  doi          = {10.18429/JACoW-ICALEPCS2023-THMBCMO22},
  url          = {https://jacow.org/icalepcs2023/papers/thmbcmo22.pdf},
  abstract     = {{Standardization is a magic word in the electronics engineering jargon. Under its umbrella, it is generated the utopia of transparent integration with the rest of the parts with minimal extra effort for the software integration. But the experimental setup in a synchrotron beamline presents multiple challenges: it is highly dynamic and diverse. In the frame of LEAPS-INNOV project (*), the Task 3 of Work Package 5 aims to define a standard for synchronization in the beamline sample environment. Their partners (ALBA, DESY, DLS, ESRF and SOLEIL) have already reached a common vision of synchronization requirements. This paper first details the participants’ actual synchronization needs on their facilities. Next, the requirements foreseen for the future are outlined in terms of interfaces, time constraints and compatibility with timing systems. To conclude, we summarize the current state of the project: the hardware interfaces and the hardware platform definition. They both have been decided considering long-term availability, use of standard sub-components, and keeping the compromise between cost, development time, maintenance, reliability, flexibility and performance. This hardware architecture proposal meets the identified requirements. In the future, under the scope of LEAPS-INNOV, a demonstrator will be built, and we will work with the industry for its future commercialization. }},
}