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RIS citation export for THMBCMO22: Towards Defining a Synchronization Standard Between Beamline Components and Synchrotron Accelerators

TY  - CONF
AU  - Avila-Abellan, J.A.
AU  - Cobb, T.M.
AU  - Hino, R.
AU  - Seeck, O.H.
AU  - Serra-Gallifa, X.
AU  - Zhang, S.
ED  - Schaa, Volker RW
ED  - Götz, Andy
ED  - Venter, Johan
ED  - White, Karen
ED  - Robichon, Marie
ED  - Rowland, Vivienne
TI  - Towards Defining a Synchronization Standard Between Beamline Components and Synchrotron Accelerators
J2  - Proc. of ICALEPCS2023, Cape Town, South Africa, 09-13 October 2023
CY  - Cape Town, South Africa
T2  - International Conference on Accelerator and Large Experimental Physics Control Systems
T3  - 19
LA  - english
AB  - Standardization is a magic word in the electronics engineering jargon. Under its umbrella, it is generated the utopia of transparent integration with the rest of the parts with minimal extra effort for the software integration. But the experimental setup in a synchrotron beamline presents multiple challenges: it is highly dynamic and diverse. In the frame of LEAPS-INNOV project (*), the Task 3 of Work Package 5 aims to define a standard for synchronization in the beamline sample environment. Their partners (ALBA, DESY, DLS, ESRF and SOLEIL) have already reached a common vision of synchronization requirements. This paper first details the participants’ actual synchronization needs on their facilities. Next, the requirements foreseen for the future are outlined in terms of interfaces, time constraints and compatibility with timing systems. To conclude, we summarize the current state of the project: the hardware interfaces and the hardware platform definition. They both have been decided considering long-term availability, use of standard sub-components, and keeping the compromise between cost, development time, maintenance, reliability, flexibility and performance. This hardware architecture proposal meets the identified requirements. In the future, under the scope of LEAPS-INNOV, a demonstrator will be built, and we will work with the industry for its future commercialization. 
PB  - JACoW Publishing
CP  - Geneva, Switzerland
SP  - 1242
EP  - 1246
KW  - experiment
KW  - interface
KW  - hardware
KW  - FPGA
KW  - synchrotron
DA  - 2024/02
PY  - 2024
SN  - 2226-0358
SN  - 978-3-95450-238-7
DO  - doi:10.18429/JACoW-ICALEPCS2023-THMBCMO22
UR  - https://jacow.org/icalepcs2023/papers/thmbcmo22.pdf
ER  -