Author: Anicic, D.
Paper Title Page
MO4AO01 Xilinx Zync Ultrascale+ MPSoC Used as Embedded IOC for a Beam Position Monitor (BPM) System 210
 
  • G.M. Marinkovic, D. Anicic, R. Ditter, B. Keil, J. Purtschert, M. Roggli
    PSI, Villigen PSI, Switzerland
 
  At PSI we are combining the hardware, firmware, operating system, control system, embedded event system, operation and supervision in a Beam Position Monitor (BPM) system for 24/7 accelerator operation, using a Multi-Processing-System-on-Chip (MPSoC) of type Xilinx Zynq UltraScale+. We presently use MPSoCs for our latest generic BPM electronics platform called "DBPM3" in the Athos soft X-ray branch, as well as for new BPMs and general controls hardware and devices for SLS 2.0, a major upgrade of the Swiss Light Source. We are also in the process of upgrading our previous "MBU" (modular BPM Unit) platform for the SwissFEL linac and hard X-ray "Aramis"  from external VMEbus based IOCs to integrated add-on cards with MPSoC IOCs. On all these MPSoCs, we are integrating an EPICS IOC, event receiver, measurement and feedback data real-time processing on a single chip. In this contribution, we describe our experience with the tight integration and daily operation of the various firmware and software components and features on the MPSoC, using the BPM system also to discuss general aspects relevant for other systems and components discussed in other PSI contributions on this conference.  
DOI • reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-MO4AO01  
About • Received ※ 06 October 2023 — Revised ※ 09 October 2023 — Accepted ※ 23 November 2023 — Issued ※ 11 December 2023
Cite • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)  
 
THPDP070 Building, Deploying and Provisioning Embedded Operating Systems at PSI 1505
 
  • D. Anicic
    PSI, Villigen PSI, Switzerland
 
  In the scope of the Swiss Light Source (SLS) upgrade project, SLS 2.0, at Paul Scherrer Institute (PSI) two New Processing Platforms (NPP), both running RT Linux, have been added to the portfolio of existing VxWorks and Linux VME systems. At the lower end we have picked a variety of boards, all based on the Xilinx Zynq UltraScale+ MPSoC. Even though these devices have less processing power, due to the built-in FPGA and Real-time CPU (RPU) they can deliver strict, hard RT performance. For high-throughput, soft-RT applications we went for Intel Xeon based single-board PCs in the CPCI-S form factor. All platforms are operated as diskless systems. For the Zynq systems we have decided on building in-house a Yocto Kirkstone Linux distribution, whereas for the Xeon PCs we employ off-the-shelf Debian 10 Buster. In addition to these new NPP systems, in the scope of our new EtherCAT-based Motion project, we have decided to use small x8664 servers, which will run the same Debian distribution as NPP. In this contribution we present the selected Operating Systems (OS) and discuss how we build, deploy and provision them to the diskless clients.  
poster icon Poster THPDP070 [0.758 MB]  
DOI • reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THPDP070  
About • Received ※ 02 October 2023 — Accepted ※ 13 October 2023 — Issued ※ 19 October 2023  
Cite • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)