Author: Zenker, K.
Paper Title Page
TUPDP021 Machine Protection System Upgrade for a New Timing System at ELBE 542
 
  • M. Justus, M. Kuntzsch, A. Schwarz, K. Zenker
    HZDR, Dresden, Germany
  • L. Krmpotić, U. Legat, Ž. Oven, U. Rojec
    Cosylab, Ljubljana, Slovenia
 
  Running a CW electron accelerator as a user facility for more than two decades necessitates upgrades or even complete redesign of subsystems at some point. At ELBE, the outdated timing system needed a replacement due to obsolete components and functional limitations. Starting in 2019, with Cosylab as contractor and using hardware by Micro Research Finland, the new timing system has been developed and tested and is about to become operational. Besides the ability to generate a broader variety of beam patterns from single pulse mode to 26 MHz CW beams for the two electron sources, one of the benefits of the new system is improved machine safety. The ELBE control systems is mainly based on PLCs and industrial SCADA tools. This contribution depicts how the timing system implementation to the existing machine entailed extensions and modifications of the ELBE machine protection system, i.e. a new core MPS PLC, and how they are being realized.  
poster icon Poster TUPDP021 [0.731 MB]  
DOI • reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP021  
About • Received ※ 04 October 2023 — Revised ※ 08 October 2023 — Accepted ※ 14 December 2023 — Issued ※ 16 December 2023
Cite • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)  
 
TUPDP022 DALI Control System Considerations 547
 
  • K. Zenker, M. Justus, R. Steinbrück
    HZDR, Dresden, Germany
 
  The Dresden Advanced Light Infrastructure (DALI) is part of the German national Helmholtz Photon Science Roadmap. It will be a high-field source of intense terahertz radiation based on accelerated electrons and the successor of the Center for High-Power Radiation Sources (ELBE) operated at HZDR since 2002. In the current phase of DALI the conceptional design report is in preparation and there are ongoing considerations which control system to use best. We will present the status of those considerations, that include defining the requirements for the control system and a discussion of control system candidates. In the early conceptional phase we are still open to any control system that can fulfill our requirements. Besides pure technical performance, features and security the requirements encompass modernity, well established support by community and companies, long term availability as well as collaboration potential and benefit. To collect opinions from the community on what is the optimal control system we prepared a survey. Like that we would like to benefit as much as possible from the community experience with different types of control systems.  
DOI • reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP022  
About • Received ※ 05 October 2023 — Revised ※ 13 October 2023 — Accepted ※ 04 December 2023 — Issued ※ 18 December 2023
Cite • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)  
 
TUPDP025 Board Bring-up with FPGA Framework and ChimeraTK on Yocto 557
 
  • J. Georg, A.W.C. Barker, Ł. Butkowski, M. Hierholzer, M. Killenberg, T. Kozak, N. Omidsajedi, M. Randall, D. Rothe, N. Shehzad, C. Willner
    DESY, Hamburg, Germany
  • K. Zenker
    HZDR, Dresden, Germany
 
  This presentation will showcase our experience in board bring-up using our FPGA Framework and ChimeraTK, our C++ hardware abstraction library. The challenges involved in working with different FPGA vendors will be discussed, as well as how the framework and library help to abstract vendor-specific details to provide a consistent interface for applications. Our approach to integrating this framework and libraries with Yocto, a popular open-source project for building custom Linux distributions, will be discussed. We will show how we leverage Yocto’s flexibility and extensibility to create a customized Linux image that includes our FPGA drivers and tools, and discuss the benefits of this approach for embedded development. Finally, we will share some of our best practices for board bring-up using our framework and library, including tips for debugging and testing. Our experience with FPGA-based board bring-up using ChimeraTK and Yocto should be valuable to anyone interested in developing embedded systems with FPGA technology  
poster icon Poster TUPDP025 [0.567 MB]  
DOI • reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-TUPDP025  
About • Received ※ 06 October 2023 — Accepted ※ 11 December 2023 — Issued ※ 15 December 2023  
Cite • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)