JACoW is a publisher in Geneva, Switzerland that publishes the proceedings of accelerator conferences held around the world by an international collaboration of editors.
@inproceedings{fernandes:icalepcs2023-mo4ao06,
author = {B.J. Fernandes and F. Babies and T. Freyermuth and P. Gessler and I.S. Soekmen and H. Sotoudi Namin},
title = {{Overview and Outlook of FPGA Based Hardware Solutions for Data Synchronization, Acquisition and Processing at the Euxfel}},
% booktitle = {Proc. ICALEPCS'23},
booktitle = {Proc. 19th Int. Conf. Accel. Large Exp. Phys. Control Syst. (ICALEPCS'23)},
eventdate = {2023-10-09/2023-10-13},
pages = {233--238},
paper = {MO4AO06},
language = {english},
keywords = {FPGA, FEL, hardware, timing, framework},
venue = {Cape Town, South Africa},
series = {International Conference on Accelerator and Large Experimental Physics Control Systems},
number = {19},
publisher = {JACoW Publishing, Geneva, Switzerland},
month = {02},
year = {2024},
issn = {2226-0358},
isbn = {978-3-95450-238-7},
doi = {10.18429/JACoW-ICALEPCS2023-MO4AO06},
url = {https://jacow.org/icalepcs2023/papers/mo4ao06.pdf},
abstract = {{The European X-Ray Free Electron Laser facility (EuXFEL) provides ultra short coherent X-Ray flashes, spaced by 220 nanoseconds and with a duration of less than 100 femtoseconds, in bursts of up to 2700 pulses every 100ms to several instruments. The facility has been using standardized Field-Programmable Gate Array (FPGA) based hardware platforms since the beginning of user operation in 2017. These are used for timing distribution, data processing from large 2D detectors, high speed digitizers for acquisition and processing of pulse signals, monitoring beam characteristics, and low latency communication protocol for pulse data vetoing and Machine Protection System (MPS). Our experience grows in tandem with user requests for more specific and challenging case studies, leading to tailor made hardware algorithms and setups. In some cases, these can be fulfilled with the integration of new hardware, where collaboration with companies for new and/or updated platforms is a key factor, or taking advantage of unused features in current setups. In this overview, we present the FPGA hardware based solutions used to fulfill EuXFEL’s requirements. We also present our efforts in integrating new solutions and possible development directions, including Machine Learning (ML) research, with the aim of bringing more accurate results and configurable setups to user experiments and facilitate communications with other platforms used in the facility, namely Programmable Logic Controllers (PLC). }},
}