ICALEPCS2023 - List of Authors (Ecker, D.)

Paper	Title	Page
THPDP063	The Embedded Monitoring Processor for High Luminosity LHC	1470
	P. Moschovakos, V. Ryjov, S. Schlenker CERN, Meyrin, Switzerland D. Ecker Bergische Universität Wuppertal, Wuppertal, Germany J.B. Olesen AU, Aarhus, Denmark
	The Embedded Monitoring Processor (EMP) is a versatile platform designed for High Luminosity LHC experiments, addressing the communication, processing, and monitoring needs of diverse applications in the ATLAS experiment, with a focus on supporting front-ends based on lpGBT (low power Giga-Bit Transceiver). Built around a commercial SoM, the EMP architecture emphasizes modularity, flexibility and the usage of standard interfaces, aiming to cover a wide range of applications and facilitating detector integrators to design and implement their specific solutions. The EMP software and firmware architecture comprises epos, the EMP operating system, quasar OPC UA servers, dedicated firmware IP cores and an ecosystem of different software libraries. This abstract outlines the software and firmware aspects of the EMP, detailing its integration with lpGBT optical interfaces, programmable logic development, and the role of the LpGbtSw library as a Hardware Abstraction Library for the LpGbt OPC UA server.
DOI •	reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THPDP063
About •	Received ※ 06 October 2023 — Revised ※ 27 October 2023 — Accepted ※ 12 December 2023 — Issued ※ 12 December 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

The Embedded Monitoring Processor for High Luminosity LHC

1470

P. Moschovakos, V. Ryjov, S. Schlenker
CERN, Meyrin, Switzerland
D. Ecker
Bergische Universität Wuppertal, Wuppertal, Germany
J.B. Olesen
AU, Aarhus, Denmark

The Embedded Monitoring Processor (EMP) is a versatile platform designed for High Luminosity LHC experiments, addressing the communication, processing, and monitoring needs of diverse applications in the ATLAS experiment, with a focus on supporting front-ends based on lpGBT (low power Giga-Bit Transceiver). Built around a commercial SoM, the EMP architecture emphasizes modularity, flexibility and the usage of standard interfaces, aiming to cover a wide range of applications and facilitating detector integrators to design and implement their specific solutions. The EMP software and firmware architecture comprises epos, the EMP operating system, quasar OPC UA servers, dedicated firmware IP cores and an ecosystem of different software libraries. This abstract outlines the software and firmware aspects of the EMP, detailing its integration with lpGBT optical interfaces, programmable logic development, and the role of the LpGbtSw library as a Hardware Abstraction Library for the LpGbt OPC UA server.

DOI •

reference for this paper ※ doi:10.18429/JACoW-ICALEPCS2023-THPDP063

About •

Received ※ 06 October 2023 — Revised ※ 27 October 2023 — Accepted ※ 12 December 2023 — Issued ※ 12 December 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)