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BiBTeX citation export for TUPDP081: The ESS Fast Beam Interlock System - Design, Deployment and Commissioning of the Normal Conducting Linac

@inproceedings{pavinato:icalepcs2023-tupdp081,
  author       = {S. Pavinato and M. Carroll and S. Gabourin and A.A. Gorzawski and A. Nordt},
  title        = {{The ESS Fast Beam Interlock System - Design, Deployment and Commissioning of the Normal Conducting Linac}},
% booktitle    = {Proc. ICALEPCS'23},
  booktitle    = {Proc. 19th Int. Conf. Accel. Large Exp. Phys. Control Syst. (ICALEPCS'23)},
  eventdate    = {2023-10-09/2023-10-13},
  pages        = {704--708},
  paper        = {TUPDP081},
  language     = {english},
  keywords     = {MMI, controls, operation, software, FPGA},
  venue        = {Cape Town, South Africa},
  series       = {International Conference on Accelerator and Large Experimental Physics Control Systems},
  number       = {19},
  publisher    = {JACoW Publishing, Geneva, Switzerland},
  month        = {02},
  year         = {2024},
  issn         = {2226-0358},
  isbn         = {978-3-95450-238-7},
  doi          = {10.18429/JACoW-ICALEPCS2023-TUPDP081},
  url          = {https://jacow.org/icalepcs2023/papers/tupdp081.pdf},
  abstract     = {{The European Spallation Source (ESS) is a research facility based in Lund, Sweden. Its linac will have an high peak current of 62.5 mA and long pulse length of 2.86 ms with a repetition rate of 14 Hz. The Fast Beam Interlock System (FBIS), as core system of the Beam Interlock System at ESS, is a critical system for ensuring the safe and reliable operation of the ESS machine. It is a modular and distributed system. FBIS will collect data from all relevant accelerator and target systems through ~300 direct inputs and decides whether beam operation can start or must stop. The FBIS operates at high data speed and requires low-latency decision-making capability to avoid introducing delays and to ensure the protection of the accelerator. This is achieved through two main hardware blocks equipped with FPGA based boards: a mTCA ’Decision Logic Node’ (DLN), executing the protection logic and realizing interfaces to Higher-Level Safety, Timing and EPICS Control Systems. The second block, a cPCI form-factor ’Signal Condition Unit’ (SCU), implements the interface between FBIS inputs/outputs and DLNs. In this paper we present the implementation of the FBIS control system, the integration of different hardware and software components and a summary on its performance during the latest beam commissioning phase to DTL4 Faraday Cup in 2023. }},
}