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RIS citation export for THPDP071: Application development on CPCI-S.0 Hardware at PSI

TY  - CONF
AU  - Johnson, I.J.
AU  - Biffiger, R.
AU  - Felici, D.
AU  - Koprek, W.
AU  - Rybaniec, R.
AU  - Stef, B.
AU  - Theidel, G.
ED  - Schaa, Volker RW
ED  - Götz, Andy
ED  - Venter, Johan
ED  - White, Karen
ED  - Robichon, Marie
ED  - Rowland, Vivienne
TI  - Application development on CPCI-S.0 Hardware at PSI
J2  - Proc. of ICALEPCS2023, Cape Town, South Africa, 09-13 October 2023
CY  - Cape Town, South Africa
T2  - International Conference on Accelerator and Large Experimental Physics Control Systems
T3  - 19
LA  - english
AB  - A Hardware and Software Toolbox is being created to accelerate the engineering of electronic components for large facility upgrades at the Paul Scherrer Institut. This Toolbox consists of modular hardware and Base Designs that follow the CPCI-S.0 concept. Our goal is to provide a starting foundation, tools, modules and libraries to simplify and accelerate developments. This contribution will focus on the Base Designs that provide advanced starting points for applications on MPSoC devices, AMD Zynq Ultrascale+. It is an environment containing both a ready-to-use system and functional building blocks. It features two main layers: one for the Processing System (PS) and one for the Programmable Logic (PL). The former is a collection of the software packages that run within an Operating System. The latter, lower layer consists of a seed Vivado project and an array of ready-to-use firmware modules. A set of device-tree-overlay scripts is also available to create high-level connections between PS and PL components. 
PB  - JACoW Publishing
CP  - Geneva, Switzerland
SP  - 1508
EP  - 1511
KW  - controls
KW  - hardware
KW  - Linux
KW  - software
KW  - electron
DA  - 2024/02
PY  - 2024
SN  - 2226-0358
SN  - 978-3-95450-238-7
DO  - doi:10.18429/JACoW-ICALEPCS2023-THPDP071
UR  - https://jacow.org/icalepcs2023/papers/thpdp071.pdf
ER  -