JACoW is a publisher in Geneva, Switzerland that publishes the proceedings of accelerator conferences held around the world by an international collaboration of editors.
TY - UNPB AU - Leonarski, F. AU - Brückner, M. AU - Lopez-Cuenca, C. AU - Mozzanica, A. AU - Stadler Kleeb, H.C. AU - Wang, M. ED - Schaa, Volker RW ED - Götz, Andy ED - Venter, Johan ED - White, Karen ED - Robichon, Marie ED - Rowland, Vivienne TI - Jungfraujoch: Data Acquisition and Real-Time Image Analysis System for Kilohertz X-Ray Pixel Array Detector J2 - Proc. of ICALEPCS2023, Cape Town, South Africa, 09-13 October 2023 CY - Cape Town, South Africa T2 - International Conference on Accelerator and Large Experimental Physics Control Systems T3 - 19 LA - english AB - The Swiss Light Source (SLS) will shortly start an upgrade to become a 4th generation light source. The higher brilliance of the new source brings new science opportunities - one of them is improving time resolution for X-ray crystallography to a microsecond regime. However, fully utilizing the new machine will require increasing the frame rate of pixel array detectors and, thus, data volume. Nine-megapixel JUNGFRAU detector planned for SLS 2.0 beamlines will generate up to 36 GB/s raw data when operated at 2 kHz, which is very challenging for computing infrastructure. To operate this JUNGFRAU detector, PSI has developed a ’Jungfraujoch’ read-out system. The system can handle the complete data rate within a single server box for fast deployment at various beamlines. The system uses FPGA smart network interface cards for data acquisition, GPUs for on-the-fly image analysis (e.g., spot finding, radial integration), and high-end CPUs for image compression. In the presentation, I will show Jungfraujoch’s capabilities, experience from time-resolved macromolecular crystallography beamtimes, and technical details. I will highlight how FPGA design with high-level languages (C/C++) can help software developers design programmable logic quickly and how it can help in rapid verification. I will also present experiences working with a memory-coherent interconnect (OpenCAPI) to integrate FPGA boards into the server system and how it compares with a mainstream peripheral bus (PCI Express). PB - JACoW Publishing CP - Geneva, Switzerland ER -